Fully differential non-op-amp-based positive feedback BJT biquad filter

ABSTRACT

The present invention comprises a fully differential non-op-amp based BJT biquad filter. The biquad filter comprises an unity gain follower receiving a positive and a negative differential input signals for generating a positive and a negative differential output signals. The biquad filter further includes a first positive feedback line connecting the positive output signal to the positive input signal and a second positive feedback line connecting the negative output signal to the negative input signal. The first positive feedback line includes a first capacitor connected in series therein and the second positive feedback line includes a second capacitor connected in series therein wherein the first and the second capacitors are of substantially equal capacitance. The unity gain follower further comprises a plurality of bipolar NPN devices and resistors connected between a common higher DC voltage and a common lower DC voltage through a constant DC current emitter. The unity gain follower is a fully differential follower which further comprises an input voltage shifting stage for receiving and shifting the voltage level of the positive and negative input signals. The unity gain follower further includes a transconductance stage for converting the shifted voltages from the input voltage shifting stage to a positive and a negative current outputs. The unity gain follower further includes a cascode stage for receiving and processing the positive and negative current outputs responsive to the bandwidth of the current outputs to generate a positive and a negative cascoded current outputs. The unity gain follower further has a load stage for receiving the cascoded current outputs to generated a positive and a negative loading voltages. The unity gain follower further includes an output voltage shifting stage for receiving and shifting the loading voltages to generate a positive and a negative shifted output voltages. The unity gain follower further includes an output buffer stage for receiving the shifted output voltages from the output voltage shifting stage and generate a positive and a negative output voltages to provide a low output impedance to the biquad filter.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to the fully differentialnon-operational amplifier (non-op-amp) based unity gain filter. Moreparticularly, this invention relates to a fully differential positivefeedback bipolar junction transistor (BJT) biquad filter using cascodewide band unity gain buffer.

2. Description of the Prior Art

Because of recent progress made in optical integrated circuits (OICs)technology and optical communication system designs, wide bandcommunication systems such as Fiber Distributed Data Interface (FDDI)and Synchronous Optical Network (SONET) impose greater demand on filtercircuit design to achieve high bandwidth requirements in these systems,particularly filters utilized for front end analog applications. Asthese types of communications systems have data transmission rateranging from 100 Mbits/sec to 200 Mbits/sec or even higher, the filtersused for the analog front end must also achieve high speed operation.Therefore, the design specifications for these filters generallyincluded performance requirements such as high speed, low powerconsumption, wide dynamic ranges, high noise rejection ratio, andgreater scale of integration and packaging.

Most of the conventional types of filters are no longer able to satisfythese requirements. One common filter used in the prior art is a passivetype of filters which generally include circuit elements of resistors,capacitors, and inductors, i.e., the R-L-C filters. This type of filtersare no longer suitable for most modern electronic applications becauseof the disadvantages that these circuits have larger volume and that theinductance circuits are not suitable for design and fabrication on ICswith large scale of integration.

Another type of filters commonly used in the prior art is a operationalamplifiers based (Op-Amp-based) active filter. This type of filters canbe structured in many different forms to implement design factors suchas negative or positive feedback, single ended or fully differential.The structures of this type of filters are altered to achieve variousdesign purposes such as application of the filter as a unity gainfollower, for increasing the noise rejection ratio, or for lowering thepower consumption requirements. This type of filters are however notsuitable for wide band communication application due to the speedlimitation of the Op-Amp-based filters.

One specific prior art fully differential op-amp-based filter is a dualsingle-ended operational filter, or generally known as Allen-Key filter,which is used to achieve unity gain. However, this type of filters arenot implemented due to the poor noise rejection and hence poor dynamicrange.

Wang et al. discloses in U.S. Pat. No. 5,117,199 entitled `FullyDifferential Follower Using Operational Amplifier` (issued on May 26,1992) a fully differential amplifier with a unity gain. The amplifierincludes a differential input stage having two pairs of differentialinputs. One pair receives the input signal. The other pair is connectedinternally to receive differential mode feedback from the output stage.

These two pairs of differential inputs are combined with a common nodefeedback signal and cascoded to the output. The amplifier incorporatesautomatic internal noise cancellation due to its differential modefeedback. Construction of the circuits by the use of CMOS or BiCMOStechnology is disclosed which may be applied for a higher frequency ofoperation up to 10 MHz. Due to the general characteristics of theop-amp-based unit gain filter, the technique disclosed by Wang et al.has a slower frequency response. Therefore, the achievable bandwidth isnot sufficient for application to filters to be operated at higherfrequency range which is now required in modern data processing,transmission and communication applications.

A non-op-amp based active filter is disclosed by Chung-Yu Wu et al.(`Design Techniques for High-Frequency CMOS Switched Capacitor filtersUsing Non-Op-Amp-Based Unity-Gain Amplifiers`, IEEE Journal of SolidState Circuits, Vol. 26, No. 10, October 1991). A fully differentialnon-op-amp-based unity gain amplifier is disclosed. The disclosed filterhas a normal gain of unity but it has greater bandwidth, better settlingbehavior, smaller chip area, and less transistors and thus can be usedto replace unity-gain buffers (UCBs) which is the amplifiers used in theswitched-capacitor (SC) filters with high gain op-amps and unity-gainfeedback. Furthermore, since the error caused by the nonlinear parasiticcapacitance and process variations can be compensated by tuning the gainof the filter, this filter can be used in a switched-capacitor filters(SCFs) operated in a relatively higher frequency range with lowerparasitic errors.

However, the filter as disclosed by Wu at al. has the limitations thatthe precision of the filter is affected by the mismatch between CMOSdevices. Additionally, the speed of the filter is still limited by theparasitic capacitance when a CMOS technology is applied. The parasiticcapacitance which exits generally between the source and the gate of aCMOS transistor typically is in the order of few pico-farad. Due to thisparasitic capacitance, the filter cannot achieve a frequency level inthe range over 100 MHz.

The techniques offered by the prior art are still limited by severalmajor difficulties including the limitations of bandwidth and devicemismatches. Furthermore, in order to achieve higher bandwidth operation,external devices are often employed which causes the difficulties innon-integrability and size limitation in integrated circuit (IC)implementation. These difficulties have caused adverse effects on systemperformance, power management, cost and reliability.

Therefore, there is still a need in the art of non-op-amp-based filtersand their application in wide band communication system design to have afully-differential filter which is suitable for high bandwidthapplication and which also has improved power supply rejection ratio anddynamic range.

SUMMARY OF THE PRESENT INVENTION

It is therefore an object of the present invention to provide a fullydifferential non-op-amp-based positive feedback BJT biquad filter toovercome the aforementioned difficulties encountered in the prior art.

Specifically, it is an object of the present invention to provide afully differential non-op-amp-based positive feedback BJT biquad filterwithout requiring external components for frequency application.

Another object of the present invention is to provide a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein the gain is generated by the ratio of a load and a degenerationresistor which can be precisely tuned to be very close to a value ofone.

Another object of the present invention is to provide a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein common-emitter and common-base stages are used to eliminate theMiller parasitic capacitance.

Another object of the present invention is to provide a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein the poles of the circuits which would limit the speed of thefilter are set to a very high frequency suitable for application in ahigh bandwidth communication network.

Briefly, in a preferred embodiment, the present invention comprises afully differential non-op-amp based BJT biquad filter. The biquad filtercomprises an unity gain follower receiving a positive and a negativedifferential input signals for generating a positive and a negativedifferential output signals. The biquad filter further includes a firstpositive feedback line connecting the positive output signal to thepositive input signal and a second positive feedback line connecting thenegative output signal to the negative input signal. The first positivefeedback line includes a first capacitor connected in series therein andthe second positive feedback line includes a second capacitor connectedin series therein wherein the first and the second capacitors are ofsubstantially equal capacitance. The unity gain follower furthercomprises a plurality of bipolar NPN devices and resistors connectedbetween a common higher DC voltage and a common lower DC voltage througha constant DC current source I_(dc). The unity gain follower is a fullydifferential follower which further comprises an input voltage shiftingstage for receiving and shifting the voltage level of the positive andnegative input signals. The unity gain follower further includes atransconductance stage for converting the shifted voltages from theinput voltage shifting stage to a positive and a negative currentoutputs. The unity gain follower further includes a cascode stage forreceiving and processing the positive and negative current outputsresponsive to the bandwidth of the current outputs to generate apositive and a negative cascoded current outputs. The unity gainfollower further has a load stage for receiving the cascoded currentoutputs to generated a positive and a negative loading voltages. Theunity gain follower further includes an output voltage shifting stagefor receiving and shifting the loading voltages to generate a positiveand a negative shifted output voltages. The unity gain follower furtherincludes an output buffer stage for receiving the shifted outputvoltages from the output voltage shifting stage and generate a positiveand a negative output voltages to provide a low output impedance to thebiquad filter.

It is an advantage of the present invention that it provides a fullydifferential non-op-amp-based positive feedback BJT biquad filterwithout requiring external components for high frequency application.

Another advantage of the present invention is that it provides a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein the gain is generated by the ratio of a load and a degenerationresistor which can be precisely tuned to be very close to a value ofone.

Another advantage of the present invention is that it provides a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein common-emitter and common-base stages are used to eliminate theMiller parasitic capacitance.

Another advantage of the present invention is that it provides a fullydifferential non-op-amp-based positive feedback BJT biquad filterwherein the poles of the circuits which would limit the speed of thefilter are set to a very high frequency suitable for application in ahigh bandwidth communication network.

These and other objects and advantages of the present invention will nodoubt become obvious to those of ordinary skill in the art after havingread the following detailed description of the preferred embodimentwhich is illustrated in the various drawing figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram showing the circuit architecture of afully differential non-op-amp-based positive feedback BJT biquad filteraccording to the present invention;

FIG. 2 is a functional block diagram of a fully differentialnon-op-amp-based positive feedback BJT biquad filter according to thepresent invention; and

FIGS. 3 is a circuit diagram of a fully differential non-op-amp-basedpositive feedback BJT biquad filter according to a preferred embodimentof the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 1 shows a fully differential non-op-amp-based positive feedback BJTbiquad filter 10, also referred in this patent application as the biquadfilter 10, illustrating the circuit architecture of the presentinvention. The fully-differential positive feedback biquad filter 10generally comprises a unit gain follower 20 with one pair ofdifferential inputs, i.e., Vin+ and Vin-, and one pair of differentialoutputs, i.e., Vout+ and Vout-. The differential mode positive feedbackis provided from Vout+ to Vin+ and Vout- to Vin- via a feedback line 12and 14 respectively wherein each of the feedback line has a capacitor 16and 18 connected in series thereon of substantially equal capacitance.Each of the input line pair, i.e., input lines 22 and 24, further has aresistor pair, i.e., R1, before the connection point of with thefeedback lines 12 and 14 and another pair of resistors, i.e., R2 afterthe connection points of the feedback lines 12 and 14 to the input lines22 and 24. A capacitor C₁₂ between the input lines 22 and 24 representsthe parasitic capacitance at the input end of the unit gain follower 20.This circuit architecture for the fully differential positive feedbackbiquad filter 10 as disclosed in the present invention provides a highinput impedance and low output impedance biquad filter. It has theadvantages that high frequency application is feasible with a filteroccupying less chip area since it does not require external components,and the filter may be used in a wide band communication network sincethe poles of the circuit in unit gain follower 20 are set at very highfrequency.

One unique feature of this invention is its implementation of a fullydifferential non-amp-based architecture as that shown for the biquadfilter 10 on a Sallen-Key type of filter. A description of theoperational principle of a Sallen-Key filter is provided in Chapter 6 ofAnalogy Filter Design by M. E. Van Valkenburg and the content of thatChapter is incorporated herein by reference. By the use of the fullydifferential non-amp-based architecture, the major difficulty of aconventional Sallen-Key filter, i.e., a poor dynamic range caused by thepoor performance in noise rejection range, is eliminated.

FIG. 2 is a circuit diagram of the fully differential positive feedbackbipolar junction transistor (BJT) biquad filter 10 wherein the designutilizes the bipolar technology to achieve high speed. The entirecircuit utilizes bipolar NPN devices and can be fully integrated andfabricated on a single chip or be included and integrated as part ofother ICs. A device 202 has a collector connected to the V_(DD), a baseconnected to the negative input Vin-, and an emitter connected to thebase of a device 216 and to the V_(ss) via a current source I_(dc). Adevice 204 has a collector connected to the V_(DD), a base connected tothe positive input Vin+, and an emitter connected the base of a device210 and to the V_(ss) via a current source I_(dc). A device 208 has acollector which is connected to the V_(DD) via a resistor 206. Thedevice 208 has a base connected to the base of a device 214 and anemitter connected to the collector of a device 210. The device 210 has acollector and a base connected as described above, and a emitterconnected to the V_(ss) via a current source I_(dc) and to the emitterof a device 216 via a resistor 218. The device 214 has a collectorconnected to the V_(DD) via a resistor 212 and to the base of a device224. The device 214 has a base connected as described above. The device214 has an emitter connected to the collector of a device 216. Thedevice 216 has a collector and a base connected as described above, andan emitter connected to V_(ss) and to the emitter of the device 210 viathe resistor 218 as described above.

The circuit connections between the devices 210, 216 and the resistor218 may be alternatively configured such that the emitter of the device210 is connected to a resistor 218-1 (not shown) with a resistance ofR_(E) and the emitter of the device 216 is also connected to a resistor218-2 (not shown) with a resistance of RE, then the resistors 218-1 and218-2 are connected together for connecting to the V_(ss) via a currentsource I_(dc). A person of ordinary skill in the art would be taught todesign the circuit with alternate circuit configurations according tothe principle and techniques disclosed in FIG. 2 of the presentinvention. Detail explanation with another drawing showing alternatecircuit connectivity is therefore not necessary.

The device 220 has a collector connected to the V_(DD) and a baseconnected as described above. The device 220 has an emitter connected toV_(ss) via a current source I_(dc) and to the base of a device 222. Thedevice 222 has a collector connected to the V_(DD) and a base connectedas described above. The device 222 has an emitter connected to V_(ss)via a current source I_(dc) and to a negative output line Vout-. Thedevice 224 has a collector connected to the V_(DD) and a bas connectedas described above. The device 224 has an emitter connected to the baseof a device 226 and to V_(ss) via a current source I_(dc). The device226 has a collector connected to V_(DD) and a base connected asdescribed above. The device 226 has an emitter has an emitter connectedto the V_(ss) via a current source I_(dc) and to the positive outputline Vout⁺.

In operation, the circuit elements 202 to 226 forms a unit gain follower20 as illustrated in FIG. 1. It is a fully differential unity gainfollower with high input impedance and low output impedance. Thecombination of the device 204, the device 210, and the resistor 218generates a high input impedance with a value of β×β×R_(E) where β isthe impedance of the devices 204 and 210 and 2R_(E) is the resistance ofthe resistor 218. The devices 202, 216 and the resistor 218 forms afully differential circuit combination with that formed by the devices204, 210 and the resistor 218. Meanwhile, the devices 210 and 216 form aemitter coupled pair for the devices 208 and 214 which are combined tobecome a cascode or a common emitter and common base stage to achievethe purpose of eliminating the Miller parasitic capacitance and toincrease the achievable bandwidth of the biquad filter 10. The unitygain which is generated by the combination of circuit elements of thedevices 206, 212, and the resistor 218 in the unity gain followercircuit is achieved by making the value of resistance R_(E) =R_(L). Thedevices 220 and 222 are emitter follower which may be used to tune theoutput voltage to the desired value thus generating a low outputimpedance with a value of R_(L) /β². The devices 224 and 226 form adifferential combination for the devices 220 and 222 thus making theunity gain follower a fully-differential unity gain follower 200.

FIG. 3 shows a block diagram of the internal structure of the fullydifferential positive feedback unity gain follower 20. The pair ofdifferential inputs, i.e., V_(in+) and V_(in-), are first connected to alevel shifting circuit 30 which comprises devices 202 and 204 to shiftthe voltage level to match the working voltage of a next stage. Thelevel shifting is accomplished by the voltage drop between the base andemitter of the 202 and 204 devices. The shifted voltage outputs, i.e.,V1₊ and V1₋ are then processed by a transconductance stage 40 whichcomprises devices 210 and 216 to convert the shifted voltages VI₊ andV1₋ to two corresponding output currents, i.e., I1⁺ and I1⁻respectively. The converted currents I1⁺ and I1⁻ are then received intoa cascode stage 50 comprising of the devices 208 and 214 to increase thebandwidth of the signal. The output currents I₂ + and I₂ - of thecascode stage 50 is coupled to a loading stage 60 comprising a pair ofload devices, i.e., devices 206 and 212 to generate two loadingvoltages, V2+ and V2- wherein the gain of the of the signal isdetermined by the circuit characteristics of the device 218. The loadingvoltages V2+ and V2- are further shifted by another level shiftingstage, i.e., output shifting stage 70 which comprises 220 and 224 tofurther fine tune the voltage for matching to the next stage of circuits(not shown). The shifted output voltages V3+ and V3- from the outputshifting stage 70 are further transmitted through an outputlow-impedance buffer 80 comprising the devices 222 and 226 whichgenerates in combination with the output level shifting stage 70 theoutput voltage V_(out) + and V_(out) - and to provide a low outputimpedance for the biquad filter 10.

Please referring to FIGS. 2 and 3, the transconductance stage 40comprises a pair of common emitter NPN devices 210 and 216 forming anemitter coupling pair of the cascode stage 50 comprising a pair ofcommon base NPN devices 208 and 214. The transconductance stage 40comprises an emitter resistor 218, having a resistance of 2R_(E),connecting the common emitters of the common emitter NPN devices 210 and216. The load stage 60 further comprises a pair of resistors 212 and 206each having a resistance of RL and each being connected between thehigher common voltage and the collector of the common base NPN devices208 and 214 of the cascode stage 50. The resistance R_(E) issubstantially of the same value as the resistance R_(L) whereby the gainof the unity gain follower is substantially of a value of unity. Theinput voltage shifting stage 30 comprises a pair ofcommon-collector-common-emitter NPN devices 202 and 204 wherein thecommon collector being connected to the higher common voltage and thecommon emitter being connected to the lower common voltage. The positiveand the negative differential input signals each being received by abase of one of the common-collector-common-emitter NPN 10 devices 202and 204 wherein each of the shifted input voltages is generated from theemitter of each of the common-collector-common-emitter NPN devices 202and 204 for inputting to the base of each of the NPN devices 210 and 216of the transconductance stage 40. The output buffer stage 80 comprises apair of common emitter NPN devices 222 and 226 with the common emitterconnected to the lower DC voltage. The output voltage shifting stage 70comprises a pair of common collector NPN devices 220 and 224 with thecommon collector connected to the higher common DC voltage. Each of thepair of common NPN devices 222 and 226 of the output buffer stage 80 isa emitter follower of one of the pair of common collector NPN devices220 and 224 of the output voltage shifting stage 70. Each of the pair ofresistors 206 and 212 of the load stage 60 connected in parallel betweenthe higher common DC voltage and the base of each of the commoncollector NPN devices 220 and 224 of the output voltage shifting stage70. Each of the positive and negative differential output signals isgenerated from each of the emitters of the pair of common emitter NPNdevices 222 and 226 of the output buffer stage 80.

Therefore, by utilizing the unity gain follower 200 in this fullydifferential filter 10, an apparatus which can be incorporated in a wideband high frequency application is disclosed according to thisinvention. The difficulties which are encountered in the prior artincluding the limitations of bandwidth, poor noise rejection ratio, andthe input and output impedance mismatches are now resolved by thepresent invention.

The circuit techniques of this cascode unity gain filter 10 to achievewide band operation ranges have several advantages. The gain of thefilter can be fine tuned by the use of the ratio of the load anddegeneration resistors, i.e., R₁ /R_(e). By adjusting the resistance ofR₁ and R_(e), a very close to unity gain is obtained. The parasiticcapacitance caused by the Miller effect is eliminated by the use of thecommon base. The poles of the circuit which limits the speed of thefilter are set at very high frequencies. These poles can be eithergenerated from the transistor's unity gain frequency which is aroundseven GHz for a typical bipolar junction transistor (BJT) technology, orit can be generated from the load resistor, i.e.,

    F.sub.t =1/(R.sub.out C.sub.out)

where Ft is the value of the frequency of one of the poles generatedfrom the load resistor Rout and the output capacitor C_(out). Again byproperly selecting the output resistor and capacitor, a very highfrequency can be generated for the frequency of the pole F_(t). Acircuit designer is thus provided with great deal of flexibility todesign the wide band unity gain BJT biquad filter which can be optimailytuned for the communication or digital signal processing systems whereinthe filter is to be implemented.

Although the present invention has been described in terms of thepresently preferred embodiment, it is to be understood that suchdisclosure is not to be interpreted as limiting. Various alternationsand modifications will no doubt become apparent to those skilled in theart after reading the above disclosure. Accordingly, it is intended thatthe appended claims be interpreted as covering all alternations andmodifications as fall within the true spirit and scope of the invention.

I claim:
 1. A full differential non-op-amp based BJT biquad filtercomprising:an unity gain follower receiving a positive and a negativedifferential input signals for generating a positive and a negativedifferential output signals; a first positive feedback line connectingsaid positive output signal to said positive input signal and a secondpositive feedback line connecting said negative output signal to saidnegative input signal; said first positive feedback line including afirst capacitor connected in series therein and said second positivefeedback line including a second capacitor connected in series thereinwherein said first and said second capacitors being of substantiallyequal capacitance; said unity gain follower being a fully differentialfollower including an input voltage shifting stage for receiving andshifting the voltage level of said positive and negative input signals;said unity gain follower further including a transconductance stage forconverting said shifted voltages from said input voltage shifting stageto a positive and a negative current outputs; said unity gain followerfurther including a cascode stage for receiving and processing saidpositive and negative current outputs responsive to the bandwidth ofsaid current outputs to generate a positive and a negative cascodedcurrent outputs; said unity gain follower further including a load stagefor receiving said cascoded current outputs to generated a positive anda negative loading voltages; said unity gain follower further includingan output voltage shifting stage for receiving and shifting said loadingvoltages to generate a positive and a negative shifted output voltages;and said unity gain follower further including an output buffer stagefor receiving said shifted output voltages from said output voltageshifting stage and generate a positive and a negative output voltages toprovide a low output impedance to said biquad filter.
 2. The BJT biquadfilter of claim 1 wherein:said transconductance stage comprises a pairof common emitter NPN devices forming an emitter coupling pair of saidcascode stage comprising a pair of common base NPN devices.
 3. The BJTbiquad filter of claim 2 wherein:said transconductance stage comprisesan emitter resistor, having a resistance of 2R_(E), connecting saidcommon emitters of said common emitter NPN devices; said load stagefurther comprising a pair of resistors each having a resistance of R_(L)and each being connected between said higher common voltage and thecollector of said common base NPN devices of said cascode stage; andsaid resistance R_(E) is substantially of the same value as saidresistance R_(L) whereby the gain of said unity gain follower issubstantially of a value of unity.
 4. The BJT biquad filter of claim 3wherein:said input voltage shifting stage comprises a pair ofcommon-collector-common-emitter NPN devices wherein said commoncollector being connected to said higher common voltage and said commonemitter being connected to said lower common voltage; and said positiveand said negative differential input signals each being received by aemitter of one of said common-collector-common-emitter NPN deviceswherein each of said shifted input voltages is generated from theemitter of each of said common-collector-common-emitter NPN devices forinputting to the base of each of the NPN devices of saidtransconductance stage.
 5. The BJT biquad filter of claim 4 wherein:saidoutput buffer stage comprising a pair of common emitter NPN devices withthe common emitter connected to said lower DC voltage; said outputvoltage shifting stage comprising a pair of common collector NPN deviceswith the common collector connected to said higher common DC voltage;and each of said pair of common NPN devices of said output buffer stageis a emitter follower of one of said pair of common collector NPNdevices of said output voltage shifting stage.
 6. The BJT biquad filterof claim 5 wherein:each of said pair of resistors of said load stageconnected in parallel between said higher common DC voltage and the baseof each of said common collector NPN devices of said output voltageshifting stage.
 7. The BJT biquad filter of claim 6 wherein:each of saidpositive and negative differential output signals is generated from eachof the emitters of said pair of common emitter NPN devices of saidoutput buffer stage.
 8. A full differential non-op-amp based BJT biquadfilter comprising:an unity gain follower receiving a positive and anegative differential input signals for generating a positive and anegative differential output signals; a first positive feedback lineconnecting said positive output signal to said positive input signal anda second positive feedback line connecting said negative output signalto said negative input signal; said first positive feedback lineincluding a first capacitor connected in series therein and said secondpositive feedback line including a second capacitor connected in seriestherein wherein said first and said second capacitors being ofsubstantially equal capacitance; said unity gain follower furthercomprises a plurality of bipolar NPN devices and resistors connectedbetween a common higher DC voltage and a common lower DC voltage througha constant DC current emitter; said unity gain follower being a fullydifferential follower further comprising: an input voltage shiftingstage for receiving and shifting the voltage level of said positive andnegative input signals; a transconductance stage for converting saidshifted voltages from said input voltage shifting stage to a positiveand a negative current outputs; a cascode stage for receiving andprocessing said positive and negative current outputs responsive to thebandwidth of said current outputs to generate a positive and a negativecascoded current outputs; a load stage for receiving said cascodedcurrent outputs to generated a positive and a negative loading voltages;an output voltage shifting stage for receiving and shifting said loadingvoltages to generate a positive and a negative shifted output voltages;and an output buffer stage for receiving said shifted output voltagesfrom said output voltage shifting stage and generate a positive and anegative output voltages to provide a low output impedance to saidbiquad filter.
 9. A full differential non-op-amp based BJT biquad filtercomprising:a non-operational amplifier (NON-OP AMP) based unity gainfollower receiving a positive and a negative differential input signalsfor generating a positive and a negative differential output signals;said NON-OP AMP based unity gain follower further includes a BJT commonemitter amplifier including a first pair of common emitter transistorswherein said common emitters being degenerated by a common emitterresistor which being connected to a direct current source (IDC); thecollectors of said pair of common emitter transistors being cascoded bya BJT common base stage including a second pair of transistors whereinsaid common base of said second pair of transistors being connected to adirect current voltage (V_(DD)) via a load resistor with a resistanceequivalent to the resistance of said common-emitter resistor; saidNON-OP AMP based unity gain follower further includes a low impedanceoutput buffer circuit including a plurality of pair of transistors beingconnected from the collectors of said second pair of transistors; eachtransistor of said first pair, said second pair, and said pluralitypairs of transistors being pairwise equivalent and symmetrical incircuit connection whereby a fully differential unity gain follower isformed; a first positive feedback line connecting said positive outputsignal to said positive input signal and a second positive feedback lineconnecting said negative output signal to said negative input signal;and said first positive feedback line including a first capacitor andresistor connected in series therein and said second positive feedbackline including a second capacitor and resistor connected in seriestherein wherein said first and said second capacitors being ofsubstantially equal capacitance, and said first and said secondresistors being of substantially equal resistance whereby a fullydifferential, positive feedback open-loop circuit is formed.